深圳市辰睿半导体有限公司

STM32F429IGT6 
Core: Arm? 32-bit Cortex?-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator?) allowing 0-wait state execution
from Flash memory, frequency up to 180 MHz,
MPU, 225 DMIPS/1.25 DMIPS/MHz
(Dhrystone 2.1), and DSP instructions
? Memories  
STM32F429IGT6 


– Up to 2 MB of Flash memory organized into
two banks allowing read-while-write
– Up to 256+4 KB of SRAM including 64-KB
of CCM (core coupled memory) data RAM
– Flexible external memory controller with up
to 32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, Compact
Flash/NOR/NAND memories  
STM32F429IGT6 


? LCD parallel interface, 8080/6800 modes
? LCD-TFT controller with fully programmable
resolution (total width up to 4096 pixels, total
height up to 2048 lines and pixel clock up to
83 MHz)
? Chrom-ART Accelerator? for enhanced
graphic content creation (DMA2D)
? Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1%
accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
? Low power   
STM32F429IGT6 


– Sleep, Stop and Standby modes
– VBAT supply for RTC, 20×32 bit backup
registers + optional 4 KB backup SRAM
? 3×12-bit, 2.4 MSPS ADC: up to 24 channels
and 7.2 MSPS in triple interleaved mode
? 2×12-bit D/A converters
? General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
? Up to 17 timers: up to twelve 16-bit and two 32-
bit timers up to 180 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
? Debug mode
– SWD & JTAG interfaces  
STM32F429IGT6 


– Cortex-M4 Trace Macrocell?
? Up to 168 I/O ports with interrupt capability
– Up to 164 fast I/Os up to 90 MHz
– Up to 166 5 V-tolerant I/Os
? Up to 21 communication interfaces
– Up to 3 × I2C interfaces (SMBus/PMBus)
– Up to 4 USARTs/4 UARTs (11.25 Mbit/s,
ISO7816 interface, LIN, IrDA, modem
control)
– Up to 6 SPIs (45 Mbits/s), 2 with muxed
full-duplex I2S for audio class accuracy via
internal audio PLL or external clock
– 1 x SAI (serial audio interface)
– 2 × CAN (2.0B Active) and SDIO interface
? Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
? 8- to 14-bit parallel camera interface up to
54 Mbytes/s
? True random number generator
? CRC calculation unit
? RTC: subsecond accuracy, hardware calendar
? 96-bit unique ID
LQFP100 (14 × 14 mm)
LQFP144 (20 × 20 mm) UFBGA176 (10 x 10 mm)
LQFP176 (24 × 24 mm)
LQFP208 (28 x 28 mm)
WLCSP143
TFBGA216 (13 x 13 mm)
UFBGA169 (7 × 7 mm)
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